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UNIVERSITY OF CALIFORNIA IRVINE
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You are viewing titles for UNIVERSITY OF CALIFORNIA IRVINE in the Computer engineering available through the UMI Dissertations & Thesis Gradwoorks site
Securing personal RFID tags and infrastructures
A scalable distributed paradigm for multi-user interaction with tiled rear projection display walls
Loss recovery via erasure coding in packet networks
Robust EKF-based wireless congestion control
Task Mapping and NI Device Driver for NoC based architecture with Linux kernel
Design of On-chip Photonic Interconnection based on Physical-Layer Analysis
UAV-aided Cross-Layer Routing for MANETs
Frame Aggregation---A Technique for Power Saving in H.264 Decoders
Real-Time SOA Using Flexible Advance Reservation
The Kirincas: Design Space Exploration of a CAN Data Aggregator in a Tiered Sensing System
A Comprehensive Survey on Sensors and Sensors Networks
Low-complexity and high-throughput protocols for wireless sensor networks
Video transmission over wireless channels
Modeling and synthesis of communication software for multi-processor systems-on-chip
A middleware architecture for service-oriented systems in support of accountability and predictability
Code layout optimization for remote progressive code update for networked embedded systems
Framework for modeling spiking neural networks on high-performance graphics processors
Beyond memory cells for leakage and temperature control in SRAM-based units, the peripheral circuits story
Low power and process variation aware SRAM and Cache design fault tolerance in SRAM circuit, architecture and organization
Agathon-DTM: Building programmer-friendly reliable distributed systems
Measurement of online social networks
Design and Application of Advanced Network-on-Chip Architecture
Energy Harvesting and Power Optimization for Remote Sensing Systems
Comprehensive Multi-level Joint Optimization for Multi-mode FIR-like Structures
Design and Evaluation of High-Throughput Network-on-Chip Router Architecture
Network Coding for Network Tomography
PHiLOSoftware: A Low Power, High Performance, Reliable, and Secure Virtualization Layer for On-Chip Software-Controlled Memories
Deterministic Parallelization of Object-Oriented Code Through Out-of-Order Execution
A Framework for Real-time Service-Oriented Architecture
Auto-Registration Techniques for Immersive Multi-Projector Displays
Power-saving method for DRAM/eDRAM and 3D-DRAM exploiting the process variations, temperature changes, device degradation, and memory access workload variations and innovative heterogeneous memory management approach using 3D-DRAM with Quality of Service
Location-based Services in Vehicular Networks