The semiconductor industry, now entering its seventh decade, continues to innovate and evolve at a breakneck pace. E. O. Wilson, the famous Harvard biologist who is an expert on ants, estimates that there are 10¹⁷ ants on earth. The semiconductor industry is now shipping 100 transistors per ant every year [1]. In addition, the pace of growth means we are building more electronics in a year than existed on January 1^st of that year!

A major driver for this growth in recent years is the portable consumer electronics market which includes cell phones, personal digital assistants, and tablets. The focus of this dissertation is centered on a new thin-film silicon technology on glass introduced by Corning Inc., and targeted to meet the needs of the portable product display market.

The work presented in this dissertation revolves around a new technology developed by Corning Inc. known as Silicon on Glass or SiOG which permits the transfer of a thin single-crystal silicon film to a glass substrate. This technology coupled with a low-temperature CMOS process has the potential to create devices with performance characteristics rivaling those developed using conventional bulk CMOS processes. These higher performing devices permit an increased level of circuit integration directly on the glass substrate and have the potential to enable new display technologies such as OLED (Organic Light Emitting Diode).

The SiOG CMOS devices are distinctly different from traditional thin-film, silicon-on-insulator, and bulk CMOS devices in that they rely on both surface and bulk conduction. Furthermore, their current-voltage characteristics are heavily influenced by fringing electric fields in the glass substrate.

This dissertation presents an overview of display technology as well as a review of computer aided design tools for integrated circuit development with a focus on compact modeling. In addition, some early work on developing advanced OLED display driver circuits using SiOG technology is presented. The bulk of this dissertation is focused on the development of compact models which properly describe the electrical characteristics of SiOG CMOS devices.

For all but the most trivial cases, the set of coupled nonlinear partial differential equations that describe semiconductor device behavior has not been solved analytically. Even when the semiconductor equations that represent current flow, charge distribution, and potential distribution are decoupled and device-specific simplifications are applied, analytic solutions remain elusive. Two different methods for developing compact models for the SiOG CMOS devices are presented with distinct methods for developing approximate solutions. In addition, a model for the fringing electric field is developed using conformal mapping techniques, and its effect on drain current is explored.

Finally, a new technique for solving the nonlinear semiconductor equations is explored. The application of a new mathematical technique known as the Homotopy Analysis Method (HAM) is presented as it relates to the general Poisson's equation for semiconductor devices.