Nanoscale memristive devices for memory and logic applications
by Jo, Sung Hyun, Ph.D., UNIVERSITY OF MICHIGAN, 2010, 143 pages; 3406295

Abstract:

As the building block of semiconductor electronics, field effect transistor (FET), approaches the sub 100 nm regime, a number of fundamental and practical issues start to emerge such as short channel effects that prevent the FET from operating properly and sub-threshold slope non-scaling that leads to increased power dissipation. In terms of nonvolatile memory, it is generally believed that transistor based Flash memory will approach the end of scaling within about a decade. As a result, novel, non-FET based devices and architectures will likely be needed to satisfy the growing demands for high performance memory and logic electronics applications.

In this thesis, we present studies on nanoscale resistance switching devices (memristive devices). The device shows excellent resistance switching properties such as fast switching time (<50 ns), high on/off ratio (>10 6), good data retention (>6 years) and programming endurance (>10 5). The studies suggest that the nonvolatile resistance switching in a nanoscale a-Si resistive switch is caused by the formation of a single conductive filament within 10 nm range near the bottom electrode. New functionalities, such as multi-bit switching with partially formed filaments, can be obtained by controlling the resistance switching process through current programming. As digital memory devices, the devices are ideally suited in the crossbar architecture which offers ultra-high density and intrinsic defect tolerance capability. As an example, a high-density (2 Gbits/cm2) lkb crossbar memory was demonstrated with excellent uniformity, high yield (>92%) and ON/OFF ratio (>103), proving its promising aspects for memory and reconfigurable logic applications.

Furthermore, we demonstrated that properly designed devices can exhibit controlled analog switching behavior and function as flux controlled memristor devices. The analog memristors can be used in biology-inspired neuromorphic circuits in which signal processing efficiency orders of magnitude higher than conventional digital computer systems can be reached. As a prototype illustration, we showed Spike Timing Dependent Plasticity (STDP), one of the key learning rules in biological system, can be realized by CMOS neurons and nanoscale memristor synapses.

 
AdviserWei Lu
SchoolUNIVERSITY OF MICHIGAN
SourceDAI/B 71-05, p. , May 2010
Source TypeDissertation
SubjectsElectrical engineering
Publication Number3406295
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