The discovery of small-world and scale-free properties of many nature, society and artificial complex networks has stimulated a great deal of interest in studying the underlying organizing principles of various complex networks. This study presents a methodology that helps to understand large size electronic circuits' topologies before the physical realization of the system.

My data show that large size electronic circuits' netlists have broad-scale patterns and large clustering coefficients. Both attributes are very different from random graphs. Furthermore, I introduce a model to explain the large clustering coefficient of electronic circuits' netlists. By applying this structure analysis, I propose an analytical algorithm for general floorplan and placement in the physical design of VLSI (Very Large Scale Integration). The new algorithm implements a partitioning based method in a top-down hierarchical way, which uses hMETIS as a hypergraph and circuit partitioning tool. The floorplanning blocks are represented in integer programming formulation and accurately placed using a non-linear solver named SNOPT. This new method decreases the CPU time when taking electronic circuits with large number of blocks.

In addition to this electronic circuits' floorplan and placement experiment, this study offers an approach to performance predictive collaborative control of UAVs (Unmanned Autonomous Vehicles) operating in environments with fixed and pop-up targets. I find an integer linear programming based solution for assigning and scheduling the fixed targets to UAVs and for computing the slack time intervals used for collaborative actions.

The common topic for both studies is based on problem solving technique. The algorithm of electronic circuits' floorplan and placement is realized by INLP (Integer Non- Linear Programming), and the tasks' scheduling and assigning for different UAVs are constructed by ILP (Integer Linear Programming).