Abstract: The partially-depleted (PD) silicon-on-insulator (SOI) Metal Semiconductor Field Effect Transistor (MESFET) has emerged as an ideal device for high voltage, wide temperature and RF applications. The SOI technology has been widely accepted due to reduced leakage current, better quality of passive components, lower parasitics and enhanced radiation hardness. The device has been fabricated using a standard SOI CMOS foundry alongside metal-oxide-semiconductor field-effect transistors (MOSFETs) without any significant change to the process. Low cost, easy integration and promising RF performance make the device a strong contender for silicon-based integrated circuits (IC). Since integrated circuit design relies heavily on SPICE simulations, there is a need to translate this ease of process integration into the computer-aided design (CAD) environment. An accurate three-terminal representation of the device in SPICE has been developed using the commercially available Triniquint's Own model (TOM-3). This model is inadequate since it does not model the influence of substrate voltage on the device. Unlike other MESFETs, where the semi-insulating substrate isolates the effect of the body-bias, the buried oxide layer in an SOI wafer is comparatively thin, resulting in a body effect that is quite significant. Therefore a new Verilog-A model has been developed for this device. The model has been verified for a wide temperature range of -180°C to +150°C. A behavioral model has been included to model the breakdown voltage. Detailed RF characterization of the circuit including, cut-off frequency, available gain and optimum matching networks for the SOI MESFET are discussed. The charge-based approach, using S-parameter measurements was used to develop the capacitance model. For model verification and exploring analog and RF applications, a simple, wide temperature, high voltage reference circuit with a temperature coefficient between 20ppm/°C to 60ppm/°C has been demonstrated. The four terminal DC model is verified by this experiment. For large-signal model verification, a board-level demonstration of a 800 MHz RF amplifier is presented.