Abstract: Low Frequency Noise (LFN) is important in analog and digital circuits. In analog circuits it affects the performance of low-noise amplifiers and the phase noise of voltage-controlled oscillators. In digital circuits it becomes more important as the supply voltage is reduced and it degrades substrate noise coupling. Low-frequency noise is due to interactions of the channel carriers with oxide/semiconductor interface traps and oxide charges. It is very dependent on the quality of the oxide/semiconductor interface and noise measurements can give important information about such interfaces and defects. Silicon-on-insulator Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) have two oxide/semiconductor interfaces: the top interface between the gate oxide and the active silicon (Si) layer and the bottom interface between the buried oxide and the active Si layer. The bottom interface is generally worse than the top interface. Most LFN measurements are made after MOSFET fabrication, but it is desirable to characterize such materials without fabricating devices. In this thesis we discuss Silicon-On-Insulator (SOI) low-frequency noise and interface trap density measurements using a Ground-Signal-Ground (GSG) and circular pseudo MOSFET structure with minimum fabrication. The pseudo MOSFET (Ψ-MOSFET) is a simple, yet powerful, device to characterize various aspects of SOI wafers and is routinely used for incoming wafer inspection to determine material parameters. This device comes in point contact and mercury probe (HgFET) configurations. The point-contact pseudo MOSFET simply requires two probes on an SOI wafer. However, the contact geometry is poorly defined leading to questions in the interpretation of the I_D-V_G data. The HgFET has the advantage of well-defined source/drain contacts, but it has an Hg/Si interface and all the vagaries that accompany metal/Si contacts, where barrier heights change with time due to surface state changes. For reproducible measurements we use deposited metal electrodes on the SOI wafer forming Schottky barrier source/drain contacts, and using the substrate as the gate. Two configurations of electrodes are proposed: the GSG arrangement and the circular pattern. Both designs allow performing of low frequency noise and frequency response measurements. This is the first time the pseudo MOSFET has been used for such measurements.