Frame Aggregation---A Technique for Power Saving in H.264 Decoders
by Das, Satyajit, M.S., UNIVERSITY OF CALIFORNIA, IRVINE, 2011, 41 pages; 1503198

Abstract:

Advances in computer technology have provided a significant reduction in application processing times. This is true even for multimedia applications, which often exhibit a pattern in their execution—they process data frames periodically. Knowledge of this pattern of frames can help us in predicting their processing time. Furthermore, the processing time of these frames, along with their real-time deadlines provide us with timing and quality constraints. Additionally, this also gives us knowledge of the available slack (a slack is the maximum time the decoding task can be delayed without missing the deadline) for each frame. We introduce a technique of frame aggregation that accumulates the slack time available for a group of frames. By accumulating slacks, we are able to create "sleep periods" for the processor which allow for significant power savings. We have performed experiments with H.264 video decoder using a model of the Cortex-A8 Hummingbird CPU on the cycle accurate Gem5 simulator. Our results show that we are able to utilize frame aggregation with simple frequency scaling techniques to reduce the energy consumption of the CPU during multimedia decoding by as much as 52 percent as compared to simple DVS.

 
AdvisersNalini Venkatasubramanian; Nikil Dutt
SchoolUNIVERSITY OF CALIFORNIA, IRVINE
SourceMAI/ 50-03, p. , Jan 2012
Source TypeThesis
SubjectsComputer engineering; Electrical engineering; Computer science
Publication Number1503198
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